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JEDEC JESD82-6A
$59.00 $35.40
DEFINITION OF THE SSTV32852 2.5 V 24-BIT TO 48-BIT SSTL_2 REGISTERED BUFFER FOR 1U STACKED DDR DIMM APPLICATIONS
Published by | Publication Date | Number of Pages |
JEDEC | 11/01/2004 | 17 |
JEDEC JESD82-6A – DEFINITION OF THE SSTV32852 2.5 V 24-BIT TO 48-BIT SSTL_2 REGISTERED BUFFER FOR 1U STACKED DDR DIMM APPLICATIONS
This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the SSTV32852 24-bit to 48-bit SSTL_2 registered buffer for stacked DDR DIMM applications. The purpose is to provide a standard for the SSTV32852 logic device, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use.
Product Details
- Published:
- 11/01/2004
- Number of Pages:
- 17
- File Size:
- 1 file , 180 KB
- Note:
- This product is unavailable in Russia, Ukraine, Belarus
Category: JEDEC
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