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Selection and Implementation Strategy for a Low-Residue, No-Clean Process
Published by | Publication Date | Number of Pages |
IPC | 12/01/1998 | 0 |
IPC TP-1115 – Selection and Implementation Strategy for a Low-Residue, No-Clean Process
This document provides direction to electronics manufacturers interested in adopting low residue (LR) assembly technology. It addresses the concerns of process engineers and others coming into the field of low-residue processes from two different areas: those who currently clean finished electronic assemblies using water-based semi-aqueous or other environmentally acceptable solvents and defluxing technologies; or those who use a standard residue level (SR) no-clean assembly process. Both types of manufacturers should understand the advantages and pitfalls of using low-residue soldering materials. This guide allows electronics manufacturers to choose the process/materials that will best suit their needs.
Product Details
- Published:
- 12/01/1998
- Note:
- This product is unavailable in Russia, Ukraine, Belarus
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